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Dr. Km. Sucheta Singh

Assistant Professor, Electrical Electronics and Communication Engineering (EECE)

sucheta.singh@sharda.ac.in

About

Dr. Km. Sucheta Singh received the B.Tech. degree in electronics and communication engineering from the Aligarh College of Engineering and Technology, Aligarh, India, in 2016, and the M.Tech. degree in VLSI technology from Sharda University, Noida, India, in 2018. She has been awarded the Ph.D. degree in VLSI Technology with the Jaypee Institute of Information Technology, Noida, in 2022. Her research work is published in various reputed IEEE transactions, SCI-indexed journals and conferences. Specific fields of interest include VLSI Design, biosensors and semiconductor devices. Her expertise includes steep sub-threshold slope semiconductor device simulation and designing.

Experience
  • Currently I am Assistant Professor in Electrical Electronics and Communication Engineering department, at Sharda University Greater Noida, India. Worked as Assistant Professor in GL Bjaj Institute of Information Technology, Greater Noida from September 2021- March 2022.  I have 4 years research experience in the field of VLSI Technology.
Qualification
  • Ph.D. (VLSI Technology)
  • M.Tech. (VLSI Technology
  • B.Tech. (Electronics and Communication)
Award & Recognition

  • Awarded by Academic Excellence Award (Gold Medal) during B.Tech. – 2016.
  • Awarded by certification of Merit during M.Tech. – 2018
  • 1st Rank awarded in Technika-16 Technical Competition.
  • Authored 2 research papers IEEE Transactions, 5 SCI Indexed journals and various international conferences.

Research

List of Journal Publications:

S. No.

 Title

 Journal

Indexing

  1.  

Design and Investigation of Dielectrically Modulated Dual-Material Gate-Oxide-Stack Double-Gate TFET for Label-Free Detection of Biomolecules

IEEE Transactions on Electron Devices

IEEE Transaction

 

  1.  

Impact of Interface Trap Charges on Analog/RF and Linearity Performances of Dual-material Gate-oxide-stack Double-gate TFET

IEEE Transactions on Device and Materials Reliability

IEEE Transaction

  1.  

Dual-Material Dual-Oxide Double-Gate TFET for Improvement in DC Characteristics, Analog/RF and Linearity Performance

Applied Physics A

SCI-Indexed

  1.  

Ambipolarity Suppressed Dual-Material Double-Source T-Shaped TFET

Silicon

SCI-Indexed

  1.  

Temperature Sensitivity Analysis of Stacked Gate-Oxide Metal Strip Junctionless Tunnel Field Effect Transistor

IET Research journals

SCI-Indexed

  1.  

Deposition and study of AZO heterojunction Schottky diodes at different temperatures

Journal of Materials Science

SCI-Indexed

  1.  

Performance and Analysis of Stack Junctionless Tunnel Field Effect Transistor

Silicon

 SCI-Indexed

List of Conference Publications:

S .No

Title

Conference Indexing

  1.  

Tunnel Field Effect Transistor for Ultra Low Power Applications: A Review

IEEE Conference

  1.  

Vertical Tunneling Based Dual-material Double-gate TFET

IEEE Conference

3

Tunnel Field Effect Transistor Based Biosensors: A Review

IEEE Conference

  1.  

Design and simulation of photovoltaic cell using simscape and MATLAB

SCI Conference

Certifications

  • Certification as organizing committee member of MEDCOM-2021
  • Certificate of Presentation in ICCCIS (IEEE International Conference on Computing, Communication, and Intelligent Systems) (Co-sponsered by IEEE), 19-20th February 2021.
  • Certificate of Presentation in ICSC 2021 (IEEE Conference, JIIT Noida).
  • Certificate of EDA Professional.
  • Certificate of merit and academic excellence.

Area of Interest

  • VLSI Technology
  • Semiconductor Devices
  • Nano-technology